Samuel Ventimiglia.
CTO at Campsor Capital. London. Engineering, regulation, real-time systems.
This is my personal site. I write here occasionally about the engineering work I find interesting — latency regimes, regulated systems under DORA, MiCA, the EU AI Act, and the practical edges of AI infrastructure.
Day job: Chief Technology Officer at Campsor Capital. Seventeen years of senior engineering work across crypto-native finance, healthcare, AI infrastructure, and cloud-native systems before that.
Recent essays
- EU AI Act Article 12: tamper-evident logging for high-risk AI systems EU AI Act Article 12 requires tamper-evident logging for every high-risk AI system. Deadline 2 August 2026. Here is what compliant logging actually means.
- DORA compliance without a full-time CTO: what it actually requires DORA applied January 2025. The regulation reads like documentation work and lands like systems work. Here is what your engineers actually have to build — and what it costs.
- CLARITY Act vs MiCA: what CTOs do now Senate Banking marks up CLARITY on 14 May 2026. If your firm is MiCA-authorised, ~80% of your engineering work already transfers to CLARITY-readiness. The mapping.
- Fractional CTO guide to MiCA CASP compliance MiCA CASP authorisation applied 30 Dec 2024. Transitional period ends 1 July 2026. Fractional CTO guide to the engineering substrate CASPs must build.
- When you actually need nanoseconds Most software never needs sub-millisecond latency. Some does. The gap between the two is an order-of-magnitude problem, not an optimisation problem — and getting it wrong burns engineering budgets faster than almost anything else a CTO can authorise.
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